tinyriscv/rtl/core
liangkangnan 738fba1d6f temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-30 18:27:30 +08:00
..
csr.sv rtl: optimize csr regs 2021-04-13 09:25:29 +08:00
csr_reg.sv temp commit 2021-04-29 19:27:25 +08:00
defines.sv temp commit 2021-04-25 17:14:09 +08:00
divider.sv temp commit 2021-04-30 18:27:30 +08:00
exception.sv temp commit 2021-04-29 19:27:25 +08:00
exu.sv temp commit 2021-04-30 18:27:30 +08:00
exu_alu_datapath.sv
exu_commit.sv
exu_dispatch.sv temp commit 2021-04-25 17:14:09 +08:00
exu_mem.sv optimize ifu and lsu 2021-04-09 20:22:34 +08:00
exu_muldiv.sv temp commit 2021-04-30 18:27:30 +08:00
gpr_reg.sv
idu.sv temp commit 2021-04-25 17:14:09 +08:00
idu_exu.sv
ifu.sv temp commit 2021-04-09 20:27:33 +08:00
ifu_idu.sv
pipe_ctrl.sv
rst_gen.sv rtl: add reset module 2021-04-13 14:12:47 +08:00
tinyriscv_core.sv temp commit 2021-04-29 19:27:25 +08:00
tracer.sv optimize ifu and lsu 2021-04-09 20:22:34 +08:00