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tinyriscv/tests/isa/generated
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Blue Liang 97efd66e78 add mul instruction 
Signed-off-by: Blue Liang <liangkangnan@163.com>
 		2020-01-02 16:12:13 +08:00
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rv32ui-p-add first release 2019-12-04 08:47:19 +08:00
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rv32um-p-mul add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mul.bin add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mul.dump add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mul.verilog add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulh add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulh.bin add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulh.dump add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulh.verilog add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhsu add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhsu.bin add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhsu.dump add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhsu.verilog add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhu add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhu.bin add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhu.dump add mul instruction 2020-01-02 16:12:13 +08:00
rv32um-p-mulhu.verilog add mul instruction 2020-01-02 16:12:13 +08:00