liangkangnan ce225394df fix reg1 reg2 bits width ... Signed-off-by: liangkangnan <liangkangnan@163.com>		2020-04-18 11:35:43 +08:00
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core	fix reg1 reg2 bits width	2020-04-18 11:35:43 +08:00
debug	add write dpc	2020-04-06 14:34:12 +08:00
perips	reorganize example and optimize interrupt	2020-04-11 19:03:49 +08:00
soc	perips: add uart_tx and gpio	2020-04-05 22:27:00 +08:00