tinyriscv/rtl
liangkangnan f0bd0845d6 fix implementation error by EDA tool
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-02-16 21:27:11 +08:00
..
defines.v add div inst 2020-01-13 08:26:41 +08:00
div.v add div inst 2020-01-13 08:26:41 +08:00
ex.v fix implementation error by EDA tool 2020-02-16 21:27:11 +08:00
id.v add div inst 2020-01-13 08:26:41 +08:00
if_id.v add div inst 2020-01-13 08:26:41 +08:00
openriscv_core.v add div inst 2020-01-13 08:26:41 +08:00
pc_reg.v add div inst 2020-01-13 08:26:41 +08:00
regs.v first release 2019-12-04 08:47:19 +08:00
sim_ram.v first release 2019-12-04 08:47:19 +08:00