added documentation

main
Dylan Missuwe 2022-10-11 19:20:52 +02:00
parent 953858d739
commit 5349d404eb
84 changed files with 4 additions and 15473 deletions

3
.gitignore vendored
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@ -2,3 +2,6 @@ Vivado
simulation
hardware/PhasedArray4x4
hardware/PhasedArray4x4 (without SR)
Vitis/.metadata
Vitis/IDE.log
Vitis/phased_array.zip

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<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item key="devices_info_Local" value="{&quot;cables&quot;:[{&quot;name&quot;:&quot;Digilent Zybo Z7 210351B104CCA&quot;,&quot;indexContextMap&quot;:{&quot;2&quot;:&quot;jsn-Zybo Z7-210351B104CCA-4ba00477-0&quot;,&quot;3&quot;:&quot;jsn-Zybo Z7-210351B104CCA-23727093-0&quot;}}]}"/>
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<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
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<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item key="sdx.custom.platform.repository.locations" value="C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_platform\export\phased_array_platform"/>
<item key="sdx.custom.platform.repository.last.directory.dialog.location" value="C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_platform\export\phased_array_platform"/>
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<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item key="sdx.custom.platform.repository.locations" value="C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_platform\export\phased_array_platform"/>
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<section name="Workbench">
<item key="WizardProjectsImportPage.STORE_COPY_PROJECT_ID" value="true"/>
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*** SESSION Oct 01, 2022 17:30:32.37 -------------------------------------------
*** SESSION Oct 01, 2022 18:12:01.54 -------------------------------------------
*** SESSION Oct 03, 2022 21:08:29.07 -------------------------------------------
*** SESSION Oct 07, 2022 15:02:57.97 -------------------------------------------

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<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="completion_proposal_size">
</section>
<section name="org.eclipse.cdt.ui.text.hover.CMacroExpansionExploration">
</section>
</section>

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15:03:56 **** Build of configuration Debug for project phased_array ****
make all
make --no-print-directory pre-build
a9-linaro-pre-build-step
' '
make --no-print-directory main-build
'Building file: ../src/helloworld.c'
'Invoking: ARM v7 gcc compiler'
arm-none-eabi-gcc -Wall -O0 -g3 -c -fmessage-length=0 -MT"src/helloworld.o" -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -IC:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/sw/phased_array_platform/standalone_domain/bspinclude/include -MMD -MP -MF"src/helloworld.d" -MT"src/helloworld.o" -o "src/helloworld.o" "../src/helloworld.c"
../src/helloworld.c: In function 'main':
../src/helloworld.c:285:21: warning: unused variable 'bt4' [-Wunused-variable]
285 | int bt4 = (bt & 0b1000) >> 3;
| ^~~
../src/helloworld.c:284:21: warning: unused variable 'bt3' [-Wunused-variable]
284 | int bt3 = (bt & 0b0100) >> 2;
| ^~~
../src/helloworld.c:283:21: warning: unused variable 'bt2' [-Wunused-variable]
283 | int bt2 = (bt & 0b0010) >> 1;
| ^~~
../src/helloworld.c:282:21: warning: unused variable 'bt1' [-Wunused-variable]
282 | int bt1 = (bt & 0b0001) >> 0;
| ^~~
'Finished building: ../src/helloworld.c'
' '
'Building target: phased_array.elf'
'Invoking: ARM v7 gcc linker'
arm-none-eabi-gcc -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -Wl,-build-id=none -specs=Xilinx.spec -Wl,-T -Wl,../src/lscript.ld -LC:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/sw/phased_array_platform/standalone_domain/bsplib/lib -o "phased_array.elf" ./src/helloworld.o ./src/platform.o -lm -Wl,--start-group,-lxil,-lgcc,-lc,--end-group
'Finished building target: phased_array.elf'
' '
'Invoking: ARM v7 Print Size'
arm-none-eabi-size phased_array.elf |tee "phased_array.elf.size"
text data bss dec hex filename
34966 1592 23000 59558 e8a6 phased_array.elf
'Finished building: phased_array.elf.size'
' '
15:04:02 **** Build of project phased_array_platform ****
buildplatform.bat 54488 phased_array_platform
XSDB Server Channel: tcfchan#1
Reading the platform : "phased_array_platform"
Failed to generate the platform.
Reason: Error: Qemu arguments File given /hddisk/Xilinx/Vitis/2021.2/data/emulation/platforms/zynq/sw/a9_standalone/qemu/qemu_args.txt do not exist
invoked from within
"::tcf::eval -progress {apply {{msg} {puts $msg}}} {tcf_send_command tcfchan#0 xsdb eval s es {{platform active phased_array_platform; platform generate }}}"
(procedure "::tcf::send_command" line 4)
invoked from within
"tcf send_command $::xsdb::curchan xsdb eval s es [list "platform active $PLATFORM_NAME; platform generate $target"]"
invoked from within
"if { $iswindows == 1 } {
set XSDB_PORT [lindex $argv 0]
set PLATFORM_NAME [lindex $argv 1]
set arglen [llength $argv]
set lastind..."
(file "C:/Xilinx/Vitis/2022.1\scripts\vitis\util\buildplatform.tcl" line 11)
15:04:07 **** Clean-only build of configuration Debug for project phased_array_system ****
make clean
rm -rf ./_sds
rm -rf package
rm -f system.bif
15:04:08 **** Build of configuration Debug for project phased_array_system ****
make all
Generating bif file for the system project
generate_system_bif.bat 54488 C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm standalone_domain C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/system.bif
sdcard_gen --xpfm C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm --sys_config phased_array_platform --bif C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/system.bif --bitstream C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit --elf C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf,ps7_cortexa9_0
creating BOOT.BIN using C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit
Running C:/Xilinx/Vitis/2022.1/bin/bootgen -image C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/sd_card_temp/boot.bif -w -o i BOOT.BIN

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15:03:56 **** Build of configuration Debug for project phased_array ****
make all
make --no-print-directory pre-build
a9-linaro-pre-build-step
' '
make --no-print-directory main-build
'Building file: ../src/helloworld.c'
'Invoking: ARM v7 gcc compiler'
arm-none-eabi-gcc -Wall -O0 -g3 -c -fmessage-length=0 -MT"src/helloworld.o" -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -IC:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/sw/phased_array_platform/standalone_domain/bspinclude/include -MMD -MP -MF"src/helloworld.d" -MT"src/helloworld.o" -o "src/helloworld.o" "../src/helloworld.c"
../src/helloworld.c: In function 'main':
../src/helloworld.c:285:21: warning: unused variable 'bt4' [-Wunused-variable]
285 | int bt4 = (bt & 0b1000) >> 3;
| ^~~
../src/helloworld.c:284:21: warning: unused variable 'bt3' [-Wunused-variable]
284 | int bt3 = (bt & 0b0100) >> 2;
| ^~~
../src/helloworld.c:283:21: warning: unused variable 'bt2' [-Wunused-variable]
283 | int bt2 = (bt & 0b0010) >> 1;
| ^~~
../src/helloworld.c:282:21: warning: unused variable 'bt1' [-Wunused-variable]
282 | int bt1 = (bt & 0b0001) >> 0;
| ^~~
'Finished building: ../src/helloworld.c'
' '
'Building target: phased_array.elf'
'Invoking: ARM v7 gcc linker'
arm-none-eabi-gcc -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -Wl,-build-id=none -specs=Xilinx.spec -Wl,-T -Wl,../src/lscript.ld -LC:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/sw/phased_array_platform/standalone_domain/bsplib/lib -o "phased_array.elf" ./src/helloworld.o ./src/platform.o -lm -Wl,--start-group,-lxil,-lgcc,-lc,--end-group
'Finished building target: phased_array.elf'
' '
'Invoking: ARM v7 Print Size'
arm-none-eabi-size phased_array.elf |tee "phased_array.elf.size"
text data bss dec hex filename
34966 1592 23000 59558 e8a6 phased_array.elf
'Finished building: phased_array.elf.size'
' '
15:04:01 Build Finished (took 4s.741ms)

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15:04:02 **** Build of project phased_array_platform ****
buildplatform.bat 54488 phased_array_platform
XSDB Server Channel: tcfchan#1
Reading the platform : "phased_array_platform"
Failed to generate the platform.
Reason: Error: Qemu arguments File given /hddisk/Xilinx/Vitis/2021.2/data/emulation/platforms/zynq/sw/a9_standalone/qemu/qemu_args.txt do not exist
invoked from within
"::tcf::eval -progress {apply {{msg} {puts $msg}}} {tcf_send_command tcfchan#0 xsdb eval s es {{platform active phased_array_platform; platform generate }}}"
(procedure "::tcf::send_command" line 4)
invoked from within
"tcf send_command $::xsdb::curchan xsdb eval s es [list "platform active $PLATFORM_NAME; platform generate $target"]"
invoked from within
"if { $iswindows == 1 } {
set XSDB_PORT [lindex $argv 0]
set PLATFORM_NAME [lindex $argv 1]
set arglen [llength $argv]
set lastind..."
(file "C:/Xilinx/Vitis/2022.1\scripts\vitis\util\buildplatform.tcl" line 11)
15:04:07 Build Finished (took 5s.666ms)

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@ -1,10 +0,0 @@
15:04:08 **** Build of configuration Debug for project phased_array_system ****
make all
Generating bif file for the system project
generate_system_bif.bat 54488 C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm standalone_domain C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/system.bif
sdcard_gen --xpfm C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm --sys_config phased_array_platform --bif C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/system.bif --bitstream C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit --elf C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf,ps7_cortexa9_0
creating BOOT.BIN using C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit
Running C:/Xilinx/Vitis/2022.1/bin/bootgen -image C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_system/Debug/sd_card_temp/boot.bif -w -o i BOOT.BIN
15:04:16 Build Finished (took 7s.971ms)

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<?xml version="1.0" encoding="ASCII"?>
<systemproject:SystemProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:sdsproject="http://www.xilinx.com/sdsproject" xmlns:systemproject="http://www.xilinx.com/systemproject" name="phased_array_system" platform="/home/dylan/workspace/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm" platformUID="xilinx:zybo-z7-20::0.0(custom)" sysConfig="phased_array_platform" runtime="C/C++" dimmRepoPath="" rootFSLocation="" linuxImage="" sysroot="">
<configuration name="Debug" id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.462184659">
<configBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Debug"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</configBuildOptions>
<lastBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Debug"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</lastBuildOptions>
</configuration>
<configuration name="Release" id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.908571209">
<configBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Release"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</configBuildOptions>
</configuration>
</systemproject:SystemProject>

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<?xml version="1.0" encoding="ASCII"?>
<systemproject:SystemProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:sdsproject="http://www.xilinx.com/sdsproject" xmlns:systemproject="http://www.xilinx.com/systemproject" name="phased_array_system" platform="/home/dylan/workspace/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm" platformUID="xilinx:zybo-z7-20::0.0(custom)" sysConfig="phased_array_platform" runtime="C/C++" dimmRepoPath="" rootFSLocation="" linuxImage="" sysroot="">
<configuration name="Debug" id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.462184659">
<configBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Debug"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</configBuildOptions>
<lastBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Debug"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</lastBuildOptions>
</configuration>
<configuration name="Release" id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.908571209">
<configBuildOptions xsi:type="systemproject:SystemOptions">
<applications name="phased_array" domainName="standalone_domain" domainPrettyName="standalone on ps7_cortexa9_0" appBuildConfig="Release"/>
<options xsi:type="sdsproject:Option" gensdcard="true" dmclkid="0"/>
</configBuildOptions>
</configuration>
</systemproject:SystemProject>

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/******************************************************************************
*
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*
* helloworld.c: simple test application
*
* This application configures UART 16550 to baud rate 9600.
* PS7 UART (Zynq) is not initialized by this application, since
* bootrom/bsp configures it to baud rate 115200
*
* ------------------------------------------------
* | UART TYPE BAUD RATE |
* ------------------------------------------------
* uartns550 9600
* uartlite Configurable only in HW design
* ps7_uart 115200 (configured by bootrom/bsp)
*/
#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
#include <unistd.h>
#include "xgpio.h"
#include <math.h>
#include "animation.h"
// math constants
#define PI 3.1415926 //PI
// parameters defined in fpga fabric
#define FREQ 40000 //carrier frequency for the transducers
#define RESOLUTION 128 //resolution in mm in which the phases can be adjusted.
// array pcb parameters
#define WIDTH 5 //number of transducers in the x direction
#define HEIGTH 5 //number of transducers in the y direction
#define DISTANCE 10.0 //distance between the transducers
// environment parameters
#define TEMPERATURE 20.0 //ambient temperature used to calculate wavelength
// accoustic lefitation example
#define MOVEMENT_RES 10 //movement resolution in steps/mm
#define ARRAY_DISTANCE 70 //distance between the top and bottom array
// calculate wavelength in air based on temperature and frequency
double wavelength = (331000*sqrt(1 + TEMPERATURE/273.0))/FREQ; //in mm
// gpio's for the columns
XGpio gpio[2][WIDTH];
// other peripherals
XGpio gpio_0;
XGpio gpio_1;
int phases[2][WIDTH][HEIGTH] = {0};
/*
* these values are measured in real life and
* correspond to the phase delay offsets from
* the individual transmitters.
* formula: (delay_us/25us) * 128
*/
int offsets[2][WIDTH][HEIGTH] = {
{{128-28, 128-105, 128-44, 128-108, 128-36},
{128-44, 128-105, 128-46, 128-38, 128-100},
{128-38, 128-38, 128-38, 128-41, 128-110},
{128-44, 128-113, 128-113, 128-97, 128-38},
{128-30, 128-51, 128-38, 128-49, 128-110}},//*/
{{128-113, 128-41, 128-92, 128-23, 128-105},
{128-46, 128-97, 128-110, 128-110, 128-41},
{128-113, 128-92, 128-46, 128-113, 128-36},
{128-102, 128-33, 128-110, 128-113, 128-97},
{128-41, 128-108, 128-44, 128-51, 128-100}}//*/
};
// rows for the delay generators (FPGA fabric)
int devIds[2][WIDTH] = {
{XPAR_HIER_0_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_1_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_2_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_3_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_4_AXI_GPIO_0_DEVICE_ID},
{XPAR_HIER_5_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_6_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_7_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_8_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_9_AXI_GPIO_0_DEVICE_ID}
};
// store previous location
double current_x = 0;
double current_y = 0;
double current_z = 0;
// initialize the gpio's
void driverInit() {
int status;
for (int i=0; i<WIDTH; i++) {
status = XGpio_Initialize(&gpio[0][i], devIds[0][i]);
if (status != XST_SUCCESS) {
print("GPIO array 0 fail\r\n");
} else {
print("GPIO array 0 success\r\n");
}
}
for (int i=0; i<WIDTH; i++) {
status = XGpio_Initialize(&gpio[1][i], devIds[1][i]);
if (status != XST_SUCCESS) {
print("GPIO array 1 fail\r\n");
} else {
print("GPIO array 1 success\r\n");
}
}
status = XGpio_Initialize(&gpio_0, XPAR_AXI_GPIO_0_DEVICE_ID);
if (status != XST_SUCCESS) {
print("paripheral GPIO 0 fail\r\n");
} else {
print("paripheral GPIO 0 success\r\n");
}
status = XGpio_Initialize(&gpio_1, XPAR_AXI_GPIO_1_DEVICE_ID);
if (status != XST_SUCCESS) {
print("paripheral GPIO 1 fail\r\n");
} else {
print("paripheral GPIO 1 success\r\n");
}
}
void configureGpio() {
// set all delay driver gpio's to outputs
for (int i=0; i<WIDTH; i++) {
XGpio_SetDataDirection(&gpio[0][i], 1, 0);
XGpio_SetDataDirection(&gpio[0][i], 2, 0);
}
for (int i=0; i<WIDTH; i++) {
XGpio_SetDataDirection(&gpio[1][i], 1, 0);
XGpio_SetDataDirection(&gpio[1][i], 2, 0);
}
XGpio_SetDataDirection(&gpio_0, 1, 0);
XGpio_SetDataDirection(&gpio_0, 2, 1);
XGpio_SetDataDirection(&gpio_1, 1, 1);
XGpio_SetDataDirection(&gpio_1, 2, 0);
XGpio_DiscreteWrite(&gpio_1, 2, 1);
}
void writePhases() {
for (int i=0; i<WIDTH; i++) {
XGpio_DiscreteWrite(&gpio[0][i], 1, (phases[0][i][0]%RESOLUTION) | (phases[0][i][1]%RESOLUTION) << 8 | (phases[0][i][2]%RESOLUTION) << 16 | (phases[0][i][3]%RESOLUTION) << 24);
XGpio_DiscreteWrite(&gpio[0][i], 2, (phases[0][i][4]%RESOLUTION));
}
for (int i=0; i<WIDTH; i++) {
XGpio_DiscreteWrite(&gpio[1][i], 1, (phases[1][i][0]%RESOLUTION) | (phases[1][i][1]%RESOLUTION) << 8 | (phases[1][i][2]%RESOLUTION) << 16 | (phases[1][i][3]%RESOLUTION) << 24);
XGpio_DiscreteWrite(&gpio[1][i], 2, (phases[1][i][4]%RESOLUTION));
}
}
void writeOffsets() {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
for (int k=0; k<2; k++) {
phases[k][i][j] = offsets[k][i][j];
}
}
}
}
/*
* focus the waves to a point given by the x, y and z coordinates
* referenced to the center of the first transducer (0, 0)
*/
void setFocusPoint(int idx, double x, double y, double z) {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
//sqrt(x*x+y*y+z*z)
double phase = sqrt((i*DISTANCE-x)*(i*DISTANCE-x) + (y)*(y) + (j*DISTANCE-z)*(j*DISTANCE-z));
phases[idx][i][j] = round((RESOLUTION - 1) - fmod(phase*(RESOLUTION/wavelength), RESOLUTION));
phases[idx][i][j] += offsets[idx][i][j];
}
}
}
/*
* steer a beam with angele x and y in radians relative to the normal vector of the array
*/
void setBeamDirection(int idx, double theta_x, double theta_y) {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
double a = -tan(theta_y);
double b = -tan(theta_x);
double phase = (a*i*DISTANCE + b*j*DISTANCE) / sqrt(1+a*a+b*b);
phases[idx][i][j] = round((RESOLUTION - 1) - fmod(phase*(RESOLUTION/wavelength), RESOLUTION));
phases[idx][i][j] += offsets[idx][i][j];
}
}
}
void levitate(double x, double y, double z) {
setFocusPoint(0, x + 20, y + ARRAY_DISTANCE/2, z + 20);
setFocusPoint(1, 4*DISTANCE - (x + 20), ARRAY_DISTANCE - (y + ARRAY_DISTANCE/2), z + 20);
}
/*
* next methods are used for levitation
*/
void setPosition(double x, double y, double z) {
current_x = x;
current_y = y;
current_z = z;
levitate(current_x, current_y, current_z);
writePhases();
}
void moveTo(double x, double y, double z, double speed) {
double dx = x - current_x;
double dy = y - current_y;
double dz = z - current_z;
double distance = sqrt(dx*dx + dy*dy + dz*dz);
double normal_dx = dx / distance;
double normal_dy = dy / distance;
double normal_dz = dz / distance;
for (double i=0; i<floor(MOVEMENT_RES*distance); i+=1) {
double f = ((double)i / (double)MOVEMENT_RES);
double itr_x = ((double)normal_dx) * f;
double itr_y = ((double)normal_dy) * f;
double itr_z = ((double)normal_dz) * f;
levitate(current_x + itr_x, current_y + itr_y, current_z + itr_z);
writePhases();
usleep((1000000.0 / ((double)MOVEMENT_RES))/((double)speed));
}
setPosition(x, y, z);
writePhases();
}
int main() {
init_platform();
driverInit();
configureGpio();
while (1) {
int bt = XGpio_DiscreteRead(&gpio_1, 1);
int sw = XGpio_DiscreteRead(&gpio_0, 2);
XGpio_DiscreteWrite(&gpio_0, 1, sw);
XGpio_DiscreteWrite(&gpio_1, 2, 1);
int bt1 = (bt & 0b0001) >> 0;
int bt2 = (bt & 0b0010) >> 1;
int bt3 = (bt & 0b0100) >> 2;
int bt4 = (bt & 0b1000) >> 3;
setPosition(0, 0, 0);
// wait until button press
XGpio_DiscreteWrite(&gpio_0, 1, 1);
while (!XGpio_DiscreteRead(&gpio_1, 1)) {
usleep(10000);
}
XGpio_DiscreteWrite(&gpio_0, 1, 0);
for (int i=0; i<198; i++) {
moveTo(knot_animation[i][0]*3, knot_animation[i][2]*3, knot_animation[i][1]*3, 30);
}
moveTo(0, 0, 0, 100);
}
print("Hello World\n\r");
print("Successfully ran Hello World application");
cleanup_platform();
return 0;
}

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<?xml version="1.0" encoding="ASCII"?>
<sdkproject:SdkProject xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:sdkproject="http://www.xilinx.com/sdkproject" name="phased_array" location="/home/dylan/workspace/phased_array" platform="/home/dylan/workspace/phased_array_platform/export/phased_array_platform/phased_array_platform.xpfm" platformUID="xilinx:zybo-z7-20::0.0(custom)" systemProject="phased_array_system" sysConfig="phased_array_platform" runtime="C/C++" cpu="standalone_domain" cpuInstance="ps7_cortexa9_0" os="standalone" dimmRepoPath="" mssSignature="dd66451c26ba4b25b4502d5912a040ac">
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<configuration name="Release" id="xilinx.gnu.armv7.exe.release.32331858" dirty="true">
<configBuildOptions xsi:type="sdkproject:SdkOptions"/>
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<template appTemplateName="hello_world"/>
</sdkproject:SdkProject>

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/******************************************************************************
*
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*
* helloworld.c: simple test application
*
* This application configures UART 16550 to baud rate 9600.
* PS7 UART (Zynq) is not initialized by this application, since
* bootrom/bsp configures it to baud rate 115200
*
* ------------------------------------------------
* | UART TYPE BAUD RATE |
* ------------------------------------------------
* uartns550 9600
* uartlite Configurable only in HW design
* ps7_uart 115200 (configured by bootrom/bsp)
*/
#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
#include <unistd.h>
#include "xgpio.h"
#include <math.h>
#include "animation.h"
// math constants
#define PI 3.1415926 //PI
// parameters defined if fpga fabric
#define FREQ 40000 //carrier frequency for the transducers
#define RESOLUTION 128 //resolution in mm in which the phases can be adjusted.
// array pcb parameters
#define WIDTH 5 //number of transducers in the x direction
#define HEIGTH 5 //number of transducers in the y direction
#define DISTANCE 10.0 //distance between the transducers
// environment parameters
#define TEMPERATURE 20.0 //ambient temperature used to calculate wavelength
// accoustic lefitation example
#define MOVEMENT_RES 10 //movement resolution in steps/mm
#define ARRAY_DISTANCE 70 //distance between the top and bottom array
// calculate wavelength in air based on temperature and frequency
double wavelength = (331000*sqrt(1 + TEMPERATURE/273.0))/FREQ; //in mm
// gpio's for the columns
XGpio gpio[2][WIDTH];
// other peripherals
XGpio gpio_0;
XGpio gpio_1;
int phases[2][WIDTH][HEIGTH] = {0};
/*
* these values are measured in real life and
* correspond to the phase delay offsets from
* the individual transmitters.
* formula: (delay_us/25us) * 128
*/
int offsets[2][WIDTH][HEIGTH] = {
{{128-28, 128-105, 128-44, 128-108, 128-36},
{128-44, 128-105, 128-46, 128-38, 128-100},
{128-38, 128-38, 128-38, 128-41, 128-110},
{128-44, 128-113, 128-113, 128-97, 128-38},
{128-30, 128-51, 128-38, 128-49, 128-110}},//*/
{{128-113, 128-41, 128-92, 128-23, 128-105},
{128-46, 128-97, 128-110, 128-110, 128-41},
{128-113, 128-92, 128-46, 128-113, 128-36},
{128-102, 128-33, 128-110, 128-113, 128-97},
{128-41, 128-108, 128-44, 128-51, 128-100}}//*/
};
// rows for the delay generators (FPGA fabric)
int devIds[2][WIDTH] = {
{XPAR_HIER_0_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_1_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_2_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_3_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_4_AXI_GPIO_0_DEVICE_ID},
{XPAR_HIER_5_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_6_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_7_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_8_AXI_GPIO_0_DEVICE_ID,
XPAR_HIER_9_AXI_GPIO_0_DEVICE_ID}
};
// store previous location
double current_x = 0;
double current_y = 0;
double current_z = 0;
// initialize the gpio's
void driverInit() {
int status;
for (int i=0; i<WIDTH; i++) {
status = XGpio_Initialize(&gpio[0][i], devIds[0][i]);
if (status != XST_SUCCESS) {
print("GPIO array 0 fail\r\n");
} else {
print("GPIO array 0 success\r\n");
}
}
for (int i=0; i<WIDTH; i++) {
status = XGpio_Initialize(&gpio[1][i], devIds[1][i]);
if (status != XST_SUCCESS) {
print("GPIO array 1 fail\r\n");
} else {
print("GPIO array 1 success\r\n");
}
}
status = XGpio_Initialize(&gpio_0, XPAR_AXI_GPIO_0_DEVICE_ID);
if (status != XST_SUCCESS) {
print("paripheral GPIO 0 fail\r\n");
} else {
print("paripheral GPIO 0 success\r\n");
}
status = XGpio_Initialize(&gpio_1, XPAR_AXI_GPIO_1_DEVICE_ID);
if (status != XST_SUCCESS) {
print("paripheral GPIO 1 fail\r\n");
} else {
print("paripheral GPIO 1 success\r\n");
}
}
void configureGpio() {
// set all delay driver outputs to outputs
for (int i=0; i<WIDTH; i++) {
XGpio_SetDataDirection(&gpio[0][i], 1, 0);
XGpio_SetDataDirection(&gpio[0][i], 2, 0);
}
for (int i=0; i<WIDTH; i++) {
XGpio_SetDataDirection(&gpio[1][i], 1, 0);
XGpio_SetDataDirection(&gpio[1][i], 2, 0);
}
XGpio_SetDataDirection(&gpio_0, 1, 0);
XGpio_SetDataDirection(&gpio_0, 2, 1);
XGpio_SetDataDirection(&gpio_1, 1, 1);
XGpio_SetDataDirection(&gpio_1, 2, 0);
XGpio_DiscreteWrite(&gpio_1, 2, 1);
}
void writePhases() {
for (int i=0; i<WIDTH; i++) {
XGpio_DiscreteWrite(&gpio[0][i], 1, (phases[0][i][0]%RESOLUTION) | (phases[0][i][1]%RESOLUTION) << 8 | (phases[0][i][2]%RESOLUTION) << 16 | (phases[0][i][3]%RESOLUTION) << 24);
XGpio_DiscreteWrite(&gpio[0][i], 2, (phases[0][i][4]%RESOLUTION));
}
for (int i=0; i<WIDTH; i++) {
XGpio_DiscreteWrite(&gpio[1][i], 1, (phases[1][i][0]%RESOLUTION) | (phases[1][i][1]%RESOLUTION) << 8 | (phases[1][i][2]%RESOLUTION) << 16 | (phases[1][i][3]%RESOLUTION) << 24);
XGpio_DiscreteWrite(&gpio[1][i], 2, (phases[1][i][4]%RESOLUTION));
}
}
void writeOffsets() {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
for (int k=0; k<2; k++) {
phases[k][i][j] = offsets[k][i][j];
}
}
}
}
/*
* focus the waves to a point given by the x, y and z coordinates
* referenced to the center of the first transducer (0, 0)
*/
void setFocusPoint(int idx, double x, double y, double z) {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
double phase = sqrt((i*DISTANCE-x)*(i*DISTANCE-x) + (y)*(y) + (j*DISTANCE-z)*(j*DISTANCE-z));
phases[idx][i][j] = round((RESOLUTION - 1) - fmod(phase*(RESOLUTION/wavelength), RESOLUTION));
phases[idx][i][j] += offsets[idx][i][j];
}
}
}
/*
* steer a beam with angele x and y in radians relative to the normal vector of the array
*/
void setBeamDirection(int idx, double theta_x, double theta_y) {
for (int i=0; i<WIDTH; i++) {
for (int j=0; j<HEIGTH; j++) {
double a = -tan(theta_y);
double b = -tan(theta_x);
double phase = (a*i*DISTANCE + b*j*DISTANCE) / sqrt(1+a*a+b*b);
phases[idx][i][j] = round((RESOLUTION - 1) - fmod(phase*(RESOLUTION/wavelength), RESOLUTION));
phases[idx][i][j] += offsets[idx][i][j];
}
}
}
void levitate(double x, double y, double z) {
setFocusPoint(0, x + 20, y + ARRAY_DISTANCE/2, z + 20);
setFocusPoint(1, 4*DISTANCE - (x + 20), ARRAY_DISTANCE - (y + ARRAY_DISTANCE/2), z + 20);
}
/*
* next methods are used for levitation
*/
void setPosition(double x, double y, double z) {
current_x = x;
current_y = y;
current_z = z;
levitate(current_x, current_y, current_z);
writePhases();
}
void moveTo(double x, double y, double z, double speed) {
double dx = x - current_x;
double dy = y - current_y;
double dz = z - current_z;
double distance = sqrt(dx*dx + dy*dy + dz*dz);
double normal_dx = dx / distance;
double normal_dy = dy / distance;
double normal_dz = dz / distance;
for (double i=0; i<floor(MOVEMENT_RES*distance); i+=1) {
double f = ((double)i / (double)MOVEMENT_RES);
double itr_x = ((double)normal_dx) * f;
double itr_y = ((double)normal_dy) * f;
double itr_z = ((double)normal_dz) * f;
levitate(current_x + itr_x, current_y + itr_y, current_z + itr_z);
writePhases();
usleep((1000000.0 / ((double)MOVEMENT_RES))/((double)speed));
}
setPosition(x, y, z);
writePhases();
}
int main() {
init_platform();
driverInit();
configureGpio();
while (1) {
int bt = XGpio_DiscreteRead(&gpio_1, 1);
int sw = XGpio_DiscreteRead(&gpio_0, 2);
XGpio_DiscreteWrite(&gpio_0, 1, sw);
XGpio_DiscreteWrite(&gpio_1, 2, 1);
int bt1 = (bt & 0b0001) >> 0;
int bt2 = (bt & 0b0010) >> 1;
int bt3 = (bt & 0b0100) >> 2;
int bt4 = (bt & 0b1000) >> 3;
setPosition(0, 0, 0);
// wait until button press
XGpio_DiscreteWrite(&gpio_0, 1, 1);
while (!XGpio_DiscreteRead(&gpio_1, 1)) {
usleep(10000);
}
XGpio_DiscreteWrite(&gpio_0, 1, 0);
for (int i=0; i<198; i++) {
moveTo(knot_animation[i][0]*3, knot_animation[i][2]*3, knot_animation[i][1]*3, 30);
}
moveTo(0, 0, 0, 100);
}
print("Hello World\n\r");
print("Successfully ran Hello World application");
cleanup_platform();
return 0;
}

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@ -1,6 +0,0 @@
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.applicationLaunchType=org.eclipse.cdt.dsf.gdb.launch.localCLaunch,debug,;org.eclipse.cdt.cdi.launch.localCLaunch,run,;
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.attachLaunchType=org.eclipse.cdt.dsf.gdb.launch.attachCLaunch,debug,;
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.postmortemLaunchType=org.eclipse.cdt.dsf.gdb.launch.coreCLaunch,debug,;
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug,;
eclipse.preferences.version=1
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n

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@ -1,4 +0,0 @@
eclipse.preferences.version=1
org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n
org.eclipse.debug.ui.build_before_launch=false
preferredTargets=org.eclipse.cdt.debug.ui.toggleCBreakpointTarget,org.eclipse.cdt.debug.ui.toggleCDynamicPrintfTarget\:org.eclipse.cdt.debug.ui.toggleCBreakpointTarget|

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@ -1,3 +0,0 @@
RepositorySearchDialogDeepSearch=false
RepositorySearchDialogSearchPath=C\:\\Users\\dylan\\Documents\\projects\\Ultrasonic_phased_array\\Vitis\\phased_array_platform
eclipse.preferences.version=1

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@ -1,7 +0,0 @@
content_assist_proposals_background=255,255,255
content_assist_proposals_foreground=0,0,0
eclipse.preferences.version=1
org.eclipse.jdt.ui.formatterprofiles.version=18
spelling_locale_initialized=true
useAnnotationsPrefPage=true
useQuickDiffPrefPage=true

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@ -1,7 +0,0 @@
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/arch=x86_64
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/name=Local
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/os=win32
configDescList=org.eclipse.launchbar.core.descriptorType.default\:SystemDebugger_phased_array_system
eclipse.preferences.version=1
org.eclipse.launchbar.core.descriptorType.default\:SystemDebugger_phased_array_system/activeLaunchMode=systemrun
org.eclipse.launchbar.core.descriptorType.default\:SystemDebugger_phased_array_system/activeLaunchTarget=org.eclipse.launchbar.core.launchTargetType.local\:Local

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@ -1,4 +0,0 @@
activeuserprofiles=LAPTOP-15RG1VIR;Team
eclipse.preferences.version=1
org.eclipse.rse.systemtype.local.systemType.defaultUserId=dylan
useridperkey=LAPTOP-15RG1VIR.Local\=dylan;

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@ -1,2 +0,0 @@
eclipse.preferences.version=1
org.eclipse.rse.preferences.order.connections=LAPTOP-15RG1VIR.Local

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@ -1,2 +0,0 @@
eclipse.preferences.version=1
overviewRuler_migration=migrated_3.1

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@ -1,5 +0,0 @@
PERSPECTIVE_BAR_EXTRAS=com.xilinx.ide.application.ui.perspectve,org.eclipse.debug.ui.DebugPerspective
SHOW_OPEN_ON_PERSPECTIVE_BAR=false
SHOW_TEXT_ON_PERSPECTIVE_BAR=true
eclipse.preferences.version=1
showIntro=false

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@ -1,2 +0,0 @@
//org.eclipse.ui.commands/state/org.eclipse.ui.navigator.resources.nested.changeProjectPresentation/org.eclipse.ui.commands.radioState=false
eclipse.preferences.version=1

File diff suppressed because it is too large Load Diff

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@ -1,5 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="GitImportWizard">
</section>
</section>

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@ -1,2 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<typeInfoHistroy/>

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@ -1,2 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<qualifiedTypeNameHistroy/>

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@ -1,2 +0,0 @@
#Cached timestamps
#Tue Oct 11 18:46:20 CEST 2022

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@ -1,57 +0,0 @@
# RSE DOM Node
00-name=LAPTOP-15RG1VIR\:local.files
01-type=FilterPool
03-attr.default=true
03-attr.deletable=true
03-attr.id=local.files
03-attr.nonRenamable=false
03-attr.owningParentName=null
03-attr.release=200
03-attr.singleFilterStringOnly=false
03-attr.singleFilterStringOnlyESet=false
03-attr.stringsCaseSensitive=true
03-attr.supportsDuplicateFilterStrings=false
03-attr.supportsNestedFilters=true
03-attr.type=default
06-child.00000.00-name=My Home
06-child.00000.01-type=Filter
06-child.00000.03-attr.default=false
06-child.00000.03-attr.filterType=default
06-child.00000.03-attr.id=My Home
06-child.00000.03-attr.nonChangable=false
06-child.00000.03-attr.nonDeletable=false
06-child.00000.03-attr.nonRenamable=false
06-child.00000.03-attr.promptable=false
06-child.00000.03-attr.relativeOrder=0
06-child.00000.03-attr.release=200
06-child.00000.03-attr.singleFilterStringOnly=false
06-child.00000.03-attr.stringsCaseSensitive=false
06-child.00000.03-attr.stringsNonChangable=false
06-child.00000.03-attr.supportsDuplicateFilterStrings=false
06-child.00000.03-attr.supportsNestedFilters=true
06-child.00000.06-child.00000.00-name=C\:\\Users\\dylan\\*
06-child.00000.06-child.00000.01-type=FilterString
06-child.00000.06-child.00000.03-attr.default=false
06-child.00000.06-child.00000.03-attr.string=C\:\\Users\\dylan\\*
06-child.00000.06-child.00000.03-attr.type=default
06-child.00001.00-name=Drives
06-child.00001.01-type=Filter
06-child.00001.03-attr.default=false
06-child.00001.03-attr.filterType=default
06-child.00001.03-attr.id=Drives
06-child.00001.03-attr.nonChangable=false
06-child.00001.03-attr.nonDeletable=false
06-child.00001.03-attr.nonRenamable=false
06-child.00001.03-attr.promptable=false
06-child.00001.03-attr.relativeOrder=0
06-child.00001.03-attr.release=200
06-child.00001.03-attr.singleFilterStringOnly=false
06-child.00001.03-attr.stringsCaseSensitive=false
06-child.00001.03-attr.stringsNonChangable=false
06-child.00001.03-attr.supportsDuplicateFilterStrings=false
06-child.00001.03-attr.supportsNestedFilters=true
06-child.00001.06-child.00000.00-name=*
06-child.00001.06-child.00000.01-type=FilterString
06-child.00001.06-child.00000.03-attr.default=false
06-child.00001.06-child.00000.03-attr.string=*
06-child.00001.06-child.00000.03-attr.type=default

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@ -1,25 +0,0 @@
# RSE DOM Node
00-name=Local
01-type=Host
03-attr.description=
03-attr.hostname=LOCALHOST
03-attr.offline=false
03-attr.promptable=false
03-attr.systemType=org.eclipse.rse.systemtype.local
03-attr.type=Local
06-child.00000.00-name=Local Connector Service
06-child.00000.01-type=ConnectorService
06-child.00000.03-attr.group=Local Connector Service
06-child.00000.03-attr.port=0
06-child.00000.03-attr.useSSL=false
06-child.00000.06-child.00000.00-name=Local Files
06-child.00000.06-child.00000.01-type=SubSystem
06-child.00000.06-child.00000.03-attr.hidden=false
06-child.00000.06-child.00000.03-attr.type=local.files
06-child.00000.06-child.00000.06-child.00000.00-name=LAPTOP-15RG1VIR___LAPTOP-15RG1VIR\:local.files
06-child.00000.06-child.00000.06-child.00000.01-type=FilterPoolReference
06-child.00000.06-child.00000.06-child.00000.03-attr.refID=local.files
06-child.00000.06-child.00001.00-name=Local Shells
06-child.00000.06-child.00001.01-type=SubSystem
06-child.00000.06-child.00001.03-attr.hidden=false
06-child.00000.06-child.00001.03-attr.type=local.shells

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@ -1,7 +0,0 @@
# RSE DOM Node
00-name=LAPTOP-15RG1VIR
01-type=Profile
03-attr.defaultPrivate=true
03-attr.isActive=true
05-ref.00000=FP.local.files_0
05-ref.00001=H.local_16

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@ -1,2 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<Memory/>

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@ -1,36 +0,0 @@
ServiceManagerID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
TransportName=TCP
AutoSetJtagFrequency=true
PeerTypeId=HARDWARE_SERVER
UserName=dylan
Port=3121
Host=127.0.0.1
OSName=Windows 10
ID=Local
AgentID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
Name=Local
ServiceManagerID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
TransportName=TCP
AutoSetJtagFrequency=false
PeerTypeId=LINUX_TCF_AGENT
UserName=dylan
Port=1534
Host=192.168.0.1
OSName=Windows 10
ID=Linux Agent
AgentID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
Name=Linux Agent
ServiceManagerID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
TransportName=TCP
AutoSetJtagFrequency=false
PeerTypeId=QEMU_TCF_GDB_CLIENT
UserName=dylan
Port=1138
Host=127.0.0.1
OSName=Windows 10
ID=QEMU
AgentID=e6223f15-e0b9-42d8-ab67-709a7cb392b2
Name=QEMU

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@ -1,6 +0,0 @@
#Sat Oct 01 17:30:29 CEST 2022
0.Icon=C\:\\Program Files\\Git\\mingw64\\share\\git\\git-for-windows.ico
0.Path=C\:\\Program Files\\Git\\bin\\sh.exe
0.Translate=true
0.Args=--login -i
0.Name=Git Bash

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@ -1,15 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="CleanDialogSettings">
<item key="BUILD_ALL" value="false"/>
<item key="TOGGLE_SELECTED" value="true"/>
<item key="BUILD_NOW" value="false"/>
</section>
<section name="SaveAsDialogSettings">
<item key="DIALOG_X_ORIGIN" value="619"/>
<item key="DIALOG_Y_ORIGIN" value="89"/>
<item key="DIALOG_WIDTH" value="700"/>
<item key="DIALOG_HEIGHT" value="645"/>
<item key="DIALOG_FONT_NAME" value="1|Segoe UI|9.0|0|WINDOWS|1|-15|0|0|0|400|0|0|0|1|0|0|0|0|Segoe UI"/>
</section>
</section>

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@ -1,3 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
</section>

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@ -1,5 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<workingSetManager>
<workingSet editPageId="org.eclipse.jdt.internal.ui.DynamicSourcesWorkingSet" factoryID="org.eclipse.ui.internal.WorkingSetFactory" id="1664638235694_0" label="Java Main Sources" name="Java Main Sources"/>
<workingSet editPageId="org.eclipse.jdt.internal.ui.DynamicSourcesWorkingSet" factoryID="org.eclipse.ui.internal.WorkingSetFactory" id="1664638235708_1" label="Java Test Sources" name="Java Test Sources"/>
</workingSetManager>

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@ -1,5 +0,0 @@
#Fri Oct 07 15:02:53 CEST 2022
org.eclipse.core.runtime=2
org.eclipse.platform=4.15.0.v20200305-0155
com.xilinx.tools.product=VITIS_IDE
com.xilinx.tools.version=2022.1.0

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@ -1,185 +0,0 @@
17:30:34 DEBUG : Logs will be stored at 'C:/Users/dylan/Documents/projects/Ultrasonic phased array/Vitis/IDE.log'.
17:30:37 ERROR : Workspace location C:\Users\dylan\Documents\projects\Ultrasonic phased array\Vitis contains spaces. Please switch to a workspace without spaces in its path.
17:30:39 INFO : Launching XSCT server: xsct.bat -n -interactive C:\Users\dylan\Documents\projects\Ultrasonic phased array\Vitis\temp_xsdb_launch_script.tcl
17:30:39 INFO : Registering command handlers for Vitis TCF services
17:30:40 INFO : Platform repository initialization has completed.
17:30:44 ERROR : (XSDB Server)couldn't read file "C:\Users\dylan\Documents\projects\Ultrasonic": no such file or directory
18:12:03 DEBUG : Logs will be stored at 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/IDE.log'.
18:12:06 INFO : Launching XSCT server: xsct.bat -n -interactive C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\temp_xsdb_launch_script.tcl
18:12:06 INFO : Registering command handlers for Vitis TCF services
18:12:07 INFO : Platform repository initialization has completed.
18:12:11 INFO : XSCT server has started successfully.
18:12:11 INFO : plnx-install-location is set to ''
18:12:18 INFO : Successfully done setting XSCT server connection channel
18:12:18 INFO : Successfully done query RDI_DATADIR
18:12:18 INFO : Successfully done setting workspace for the tool.
21:08:31 DEBUG : Logs will be stored at 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/IDE.log'.
21:08:33 INFO : Launching XSCT server: xsct.bat -n -interactive C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\temp_xsdb_launch_script.tcl
21:08:34 INFO : Registering command handlers for Vitis TCF services
21:08:35 INFO : Platform repository initialization has completed.
21:08:38 INFO : XSCT server has started successfully.
21:08:46 INFO : plnx-install-location is set to ''
21:08:46 INFO : Successfully done setting XSCT server connection channel
21:08:46 INFO : Successfully done query RDI_DATADIR
21:08:46 INFO : Successfully done setting workspace for the tool.
21:28:12 DEBUG : Logs will be stored at 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/IDE.log'.
21:28:14 INFO : Launching XSCT server: xsct.bat -n -interactive C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\temp_xsdb_launch_script.tcl
21:28:15 INFO : Registering command handlers for Vitis TCF services
21:28:15 INFO : Platform repository initialization has completed.
21:28:17 INFO : XSCT server has started successfully.
21:28:17 INFO : plnx-install-location is set to ''
21:28:17 INFO : Successfully done setting XSCT server connection channel
21:28:17 INFO : Successfully done query RDI_DATADIR
21:28:17 INFO : Successfully done setting workspace for the tool.
21:34:10 INFO : Platform 'phased_array_platform' is added to custom repositories.
21:34:12 INFO : [Import] Updating active build configuration of the system project 'phased_array_system' to 'Debug' after the import.
21:36:37 INFO : Checking for BSP changes to sync application flags for project 'phased_array'...
15:02:59 DEBUG : Logs will be stored at 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/IDE.log'.
15:03:00 INFO : Launching XSCT server: xsct.bat -n -interactive C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\temp_xsdb_launch_script.tcl
15:03:04 INFO : Registering command handlers for Vitis TCF services
15:03:05 INFO : Platform repository initialization has completed.
15:03:05 INFO : XSCT server has started successfully.
15:03:05 INFO : Successfully done setting XSCT server connection channel
15:03:10 INFO : plnx-install-location is set to ''
15:03:10 INFO : Successfully done setting workspace for the tool.
15:03:10 INFO : Successfully done query RDI_DATADIR
15:03:52 INFO : Checking for BSP changes to sync application flags for project 'phased_array'...
15:08:43 INFO : Connected to target on host '127.0.0.1' and port '3121'.
15:08:43 INFO : Jtag cable 'Digilent Zybo Z7 210351B104CCA' is selected.
15:08:43 INFO : 'jtag frequency' command is executed.
15:08:43 INFO : Context for 'APU' is selected.
15:08:44 INFO : System reset is completed.
15:08:47 INFO : 'after 3000' command is executed.
15:08:47 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}' command is executed.
15:08:49 INFO : Device configured successfully with "C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit"
15:08:49 INFO : Context for 'APU' is selected.
15:08:50 INFO : Hardware design and registers information is loaded from 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa'.
15:08:50 INFO : 'configparams force-mem-access 1' command is executed.
15:08:50 INFO : Context for 'APU' is selected.
15:08:50 INFO : Sourcing of 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl' is done.
15:08:51 INFO : 'ps7_init' command is executed.
15:08:51 INFO : 'ps7_post_config' command is executed.
15:08:51 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:08:52 INFO : The application 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf' is downloaded to processor 'ps7_cortexa9_0'.
15:08:52 INFO : 'configparams force-mem-access 0' command is executed.
15:08:52 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -nocase -filter {name =~"APU*"}
rst -system
after 3000
targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}
fpga -file C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit
targets -set -nocase -filter {name =~"APU*"}
loadhw -hw C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa -mem-ranges [list {0x40000000 0xbfffffff}] -regs
configparams force-mem-access 1
targets -set -nocase -filter {name =~"APU*"}
source C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl
ps7_init
ps7_post_config
targets -set -nocase -filter {name =~ "*A9*#0"}
dow C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf
configparams force-mem-access 0
----------------End of Script----------------
15:08:52 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:08:52 INFO : 'con' command is executed.
15:08:52 INFO : ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "*A9*#0"}
con
----------------End of Script----------------
15:08:52 INFO : Launch script is exported to file 'C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_system\_ide\scripts\systemdebugger_phased_array_system_standalone.tcl'
15:11:57 INFO : Disconnected from the channel tcfchan#3.
15:11:57 INFO : Connected to target on host '127.0.0.1' and port '3121'.
15:11:57 INFO : Jtag cable 'Digilent Zybo Z7 210351B104CCA' is selected.
15:11:57 INFO : 'jtag frequency' command is executed.
15:11:57 INFO : Context for 'APU' is selected.
15:11:57 INFO : System reset is completed.
15:12:00 INFO : 'after 3000' command is executed.
15:12:01 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}' command is executed.
15:12:03 INFO : Device configured successfully with "C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit"
15:12:03 INFO : Context for 'APU' is selected.
15:12:06 INFO : Hardware design and registers information is loaded from 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa'.
15:12:06 INFO : 'configparams force-mem-access 1' command is executed.
15:12:06 INFO : Context for 'APU' is selected.
15:12:06 INFO : Sourcing of 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl' is done.
15:12:07 INFO : 'ps7_init' command is executed.
15:12:07 INFO : 'ps7_post_config' command is executed.
15:12:07 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:12:07 INFO : The application 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf' is downloaded to processor 'ps7_cortexa9_0'.
15:12:07 INFO : 'configparams force-mem-access 0' command is executed.
15:12:07 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -nocase -filter {name =~"APU*"}
rst -system
after 3000
targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}
fpga -file C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit
targets -set -nocase -filter {name =~"APU*"}
loadhw -hw C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa -mem-ranges [list {0x40000000 0xbfffffff}] -regs
configparams force-mem-access 1
targets -set -nocase -filter {name =~"APU*"}
source C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl
ps7_init
ps7_post_config
targets -set -nocase -filter {name =~ "*A9*#0"}
dow C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf
configparams force-mem-access 0
----------------End of Script----------------
15:12:07 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:12:07 INFO : 'con' command is executed.
15:12:07 INFO : ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "*A9*#0"}
con
----------------End of Script----------------
15:12:07 INFO : Launch script is exported to file 'C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_system\_ide\scripts\systemdebugger_phased_array_system_standalone.tcl'
15:15:57 INFO : Disconnected from the channel tcfchan#4.
15:15:58 INFO : Connected to target on host '127.0.0.1' and port '3121'.
15:16:07 INFO : Jtag cable 'Digilent Zybo Z7 210351B104CCA' is selected.
15:16:07 INFO : 'jtag frequency' command is executed.
15:16:07 INFO : Context for 'APU' is selected.
15:16:07 INFO : System reset is completed.
15:16:11 INFO : 'after 3000' command is executed.
15:16:11 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}' command is executed.
15:16:13 INFO : Device configured successfully with "C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit"
15:16:13 INFO : Context for 'APU' is selected.
15:16:13 INFO : Hardware design and registers information is loaded from 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa'.
15:16:13 INFO : 'configparams force-mem-access 1' command is executed.
15:16:13 INFO : Context for 'APU' is selected.
15:16:13 INFO : Sourcing of 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl' is done.
15:16:14 INFO : 'ps7_init' command is executed.
15:16:14 INFO : 'ps7_post_config' command is executed.
15:16:15 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:16:15 INFO : The application 'C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf' is downloaded to processor 'ps7_cortexa9_0'.
15:16:15 INFO : 'configparams force-mem-access 0' command is executed.
15:16:15 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -nocase -filter {name =~"APU*"}
rst -system
after 3000
targets -set -filter {jtag_cable_name =~ "Digilent Zybo Z7 210351B104CCA" && level==0 && jtag_device_ctx=="jsn-Zybo Z7-210351B104CCA-23727093-0"}
fpga -file C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/bitstream/design_1_wrapper.bit
targets -set -nocase -filter {name =~"APU*"}
loadhw -hw C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array_platform/export/phased_array_platform/hw/design_1_wrapper.xsa -mem-ranges [list {0x40000000 0xbfffffff}] -regs
configparams force-mem-access 1
targets -set -nocase -filter {name =~"APU*"}
source C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/_ide/psinit/ps7_init.tcl
ps7_init
ps7_post_config
targets -set -nocase -filter {name =~ "*A9*#0"}
dow C:/Users/dylan/Documents/projects/Ultrasonic_phased_array/Vitis/phased_array/Debug/phased_array.elf
configparams force-mem-access 0
----------------End of Script----------------
15:16:15 INFO : Context for processor 'ps7_cortexa9_0' is selected.
15:16:15 INFO : 'con' command is executed.
15:16:15 INFO : ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "*A9*#0"}
con
----------------End of Script----------------
15:16:15 INFO : Launch script is exported to file 'C:\Users\dylan\Documents\projects\Ultrasonic_phased_array\Vitis\phased_array_system\_ide\scripts\systemdebugger_phased_array_system_standalone.tcl'
18:46:18 INFO : Disconnected from the channel tcfchan#5.

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